olo_base_fifo_packet¶
Status Information¶
VHDL Source: olo_base_fifo_packet
Description¶
This component implements a synchronous packet FIFO. The FIFO works in store and forward mode. This means a packet is only presented to the output after it is written into the FIFO completely.
This component offers the following additional features compared to olo_base_fifo_sync:
- Due to the store and forward implementation, packets are compressed. Even if the data is written into the FIFO at low rate, it is guaranteed that the packet can be read in a single short burst once it is presented at the output.
- Writing of a packet into a FIFO can be aborted at any time during writing the packet (see
Dropping Packets on Write Side). The write pointer is automatically rewinded in
this case.
- Example use-case: A CRC error can only be detected at the end of the packet. User logic can still write the packet into the FIFO directly and just asserts In_Drop if a CRC error is detected at the end of the packet. The full packet (including already written data) is ignored.
- On the read side, it is possible to skip the remaining data of a packet at any time during reading a packet (see
Skipping Packets on Read Side).
- Example use-case: The user logic is interested only in some packet types. If a different packet type is found in the header, Out_Next can be asserted to skip the rest of the packet and directly continue reading the next packet.
- On the read side, it is possible to repeat a packet (see
Repeating Packets on Read Side).
- Example use-case: A packet is read from the FIFO and transmitted wirelessly. During sending the packet a collision occurs and the transmission is aborted. In this situation the user logic can assert Out_Repeat to read the same packet again and retry the transmission.
Below samples assumes Depth_g=32 and Optimiization_g=SPEED.
The memory is described in a way that it utilizes RAM resources (Block-RAM or distributed RAM) available in FPGAs with commonly used tools. For this purpose olo_base_ram_sdp is used.
The FIFO has AXI-S interfaces on read and write side.
The RAM behavior (read-before-write or write-before-read) can be selected. This allows efficiently implementing FIFOs for different technologies (some technologies implement one, some the other behavior).
The FIFO contains a large RAM for packet data and a small olo_base_fifo_sync for storing the sizes of individual packets.
Packets exceeding Depth_g cannot be processed in store and forward mode and are therefore dropped automatically. Additionally packets exceeding MaxPacketSize_g are dropped if MaxPacketSize_g is set to any other value than -1.
Feature Set¶
The FIFO supports two features sets (FeatureSet_g):
- FULL: Exactly as described above
- DROP_ONLY: Only supports dropping packets on the write side. Skipping and repeating packets on the read side is not supported. Out_Size is not provided.
- DROP_SKIP_ONLY: Supports dropping packets on the write side and skipping packets on the read side. Repeating packets on the read side is not supported.
The DROP_ONLY feature set requires less resources and does not limit the number of packets that can be stored in the FIFO. This prevents backpressure due to reaching the maximum packet count - which is especially useful for cases where the packet size varies a lot or there are a huge number of very small packets.
Optimization¶
The FIFO can be optimized for two targets.
- SPEED: The FIFO is optimized for best clock speed.
- Due to implementation reasons the FIFO introduces one stall cycle per packet on the read-side in this mode. Hence the FIFO throughput is suboptimal for small packets.
- This mode is supported for all FeatureSet_g options.
- THROUGHPUT: The FIFO is optimized for best throughput.
- In this mode no stall cycles are introduced on the read side. Hence the FIFO can achieve a throughput of 100% even for small packets as long they are more than 3 data-beats in size.
- This mode is only supported for FeatureSet_g=DROP_ONLY and FeatureSet_g=DROP_SKIP_ONLY.
Generics¶
| Name | Type | Default | Description |
|---|---|---|---|
| Width_g | positive | - | Number of bits per FIFO entry (word-width) |
| Depth_g | positive | - | Number of FIFO entries |
| MaxPacketSize_g | integer | -1 | Maximum allowed packet size in number of words/data-beats. -1: No limit is enforced, only packets > Depth_g are discarded Positive Integer: Packets > MaxPacketSize_g are discarded |
| FeatureSet_g | string | "FULL" | Feature set to implement: FULL: All Features DROP_ONLY: No Out_Repeat, Out_Next and Out_Size DROP_SKIP_ONLY: No Out_Repeat |
| Optimization_g | string | "SPEED" | Optimization target: SPEED: Optimized for best clock speed (introduces one stall cycle per packet on the read side) THROUGHPUT: Optimized for best throughput (no stall cycles on the read side, but only supported for DROP_ONLY and DROP_SKIP_ONLY) |
| RamStyle_g | string | "auto" | Through this generic, the exact resource to use for implementation can be controlled. This generic is applied to the attributes ram_style and ramstyle which vendors offer to control RAM implementation. For details refer to the description in olo_base_ram_sdp. |
| RamBehavior_g | string | "RBW" | "RBW" = read-before-write, "WBR" = write-before-read For details refer to the description in olo_base_ram_sdp. |
| SmallRamStyle_g | string | "auto" | Same as RamStyle_g but applies to the small FIFO for packet sizes instead of the main RAM. Offers the additional option "same" to use the same value as for RamStyle_g. Not used for FeatureSet_g=DROP_ONLY |
| SmallRamBehavior_g | string | "same" | Same as RamBehavior_g but applies to the small FIFO for packet sizes instead of the main RAM. Offers the additional option "same" to use the same value as for RamBehavior_g. Not used for FeatureSet_g=DROP_ONLY |
| MaxPackets_g | positive | 17 | Controls how many packets can be stored at maximum in the FIFO (i.e. controls the size of the packet-size FIFO). Range: 2 ... 2^31-1 Optional for FeatureSet_g=DROP_ONLY |
Interfaces¶
Control¶
| Name | In/Out | Length | Default | Description |
|---|---|---|---|---|
| Clk | in | 1 | - | Clock |
| Rst | in | 1 | - | Reset input (high-active, synchronous to Clk) |
Input Data¶
| Name | In/Out | Length | Default | Description |
|---|---|---|---|---|
| In_Data | in | Width_g | - | Input data |
| In_Valid | in | 1 | '1' | AXI4-Stream handshaking signal for In_Data |
| In_Ready | out | 1 | N/A | AXI4-Stream handshaking signal for In_Data |
| In_Last | in | 1 | '1' | AXI4-Stream end of packet signaling for In_Data |
| In_Drop | in | 1 | '0' | Assert this signal for dropping the current packet (not storing it in the FIFO). |
| In_IsDropped | out | 1 | N/A | Indicates that the current packet is dropped. Either because In_Drop was asserted during the packet or because the packet exceeds the Depth_g of the FIFO. |
Output Data¶
| Name | In/Out | Length | Default | Description |
|---|---|---|---|---|
| Out_Data | out | Width_g | N/A | Output data |
| Out_Valid | out | 1 | N/A | AXI4-Stream handshaking signal for Out_Data |
| Out_Ready | in | 1 | '1' | AXI4-Stream handshaking signal for Out_Data |
| Out_Last | out | 1 | N/A | AXI4-Stream end of packet signaling for Out_Data |
| Out_Size | out | ceil(log2(Depth_g+1)) | N/A | Indicates the size of the current packet in words/data-beats. Not used for FeatureSet_g=DROP_ONLY |
| Out_Next | in | 1 | '0' | Assert this signal for aborting readout of the current packet and jump to the next one. Not used for FeatureSet_g=DROP_ONLY |
| Out_Repeat | in | 1 | '0' | Assert this signal for repeating this packet one more time after it was read completely (or it was aborted due to Out_Next). Not used for FeatureSet_g=DROP_ONLY and FeatureSet_g=DROP_SKIP_ONLY |
For aborting the current packet and repeating it one more time, Out_Next and Out_Repeat can be asserted both at the same time.
Note that it also is possible to repeat a packet several times by asserting Out_Repeat again during the repeated readout of the packet.
Status¶
| Name | In/Out | Length | Default | Description |
|---|---|---|---|---|
| PacketLevel | out | ceil(log2(MaxPackets_g+1)) | N/A | Number of packets stored in the FIFO. The counter is incremented after a packet was written completely and decremented after the packet was read completely or skipped (due to Out_Next). Note: Because in FeatureSet_g=DROP_ONLY the packet number is not limited, PacketLevel will wrap around on overflow unless the user ensures 'MaxPackets_g' is never exceeded. |
| FreeWords | out | ceil(log2(Depth_g+1)) | N/A | Available space in the FIFO. The counter is decremented during writing of the packet as the individual words are written. The counter is increased after the packet was read completely or skipped (due to Out_Next) for Optimization_g=SPEED The counter is increased with every word read for Optimization_g=THROUGHPUT. The counter is also increased if a packet is dropped (due to In_Drop or its size exceeding Depth_g or MaxPacketSize_g) |
Details¶
Architecture¶
FeatureSet_g = FULL / DROP_SKIP_ONLY¶
The FIFO works like a normal FIFO, just that it contains a small FIFO storing the end address for each packet. This allows to calculate the packet size on the read size for indication through Out_Size and asserting Out_Last on the correct data-beat.
The end-address of the currently read packet is removed from the FIFO when readout starts. Therefore the depth of the FIFO for the end-address is MaxPackets_g-1. This is also the reason for the default value of 17: 16 is a reasonable default size of the FIFO (maps well to distributed RAM in all common FPGA architectures) and one more packet is currently being read-out.
The olo_base_fifo_packet does stop accepting new packets when MaxPackets_g is reached.
FeatureSet_g = DROP_ONLY¶
The architecture is similar to the FULL feature set, just that the small FIFO for storing the end-addresses of packets is omitted and replaced by simply handing over the end address of the last completely written packet to the read logic.
This option can be especially useful if the packet size varies a lot and for target technologies where distributed RAM is not available and hence the small FIFO would consume either a lot of FFs or a full block RAM.
Unused ports are shown in gray.
The olo_base_fifo_packet does NOT stop accepting new packets when MaxPackets_g is reached. In this situation PacketLevel will overflow. If PacketLevel and DROP_ONLY are used together, the user must ensure MaxPackets_g is set to a high enough value.
Dropping Packets on Write Side¶
For dropping a packet during writing it into the FIFO, the In_Drop signal is asserted anywhere between (including) the transaction of the first data word and (including) the transaction of the last data word.
The signal In_IsDropped is kept asserted from the clock cycle where In_Drop is asserted until the end of the packet. The signal is implemented to avoid that user logic has to remember whether In_Drop was at any earlier point during writing a packet.
Note that the user may still provide more data after In_Drop being asserted. All this data until In_Last is ignored.
Below is an example for asserting In_Drop during a packet:
It is also allowed to assert In_Drop together with the last data word of a packet:
In_Drop can also be detected when In_Valid or In_Ready are low (i.e. in between transactions). However, it is strongly suggested that the signal is kept asserted until a transaction (In_Valid and In_Ready both are high) for easy understanding of the waveforms and to be in-line with the AXI4-Stream handshaking protocol.
Skipping Packets on Read Side¶
This feature is only supported for FeatureSet_g=FULL and FeatureSet_g=DROP_SKIP_ONLY.
For skipping the rest of a packet on the read side, the Out_Next signal is aserted anywhere between (including) the transaction of the first data word and the transaction of the last data word. Asserting the signal on the last data word does not have any effect because there is no more data to skip at this point.
Skipped packets are ended by asserting Out_Last earlier and omitting the remaining data words - hence the AXI4-Stream protocol is fully respected (Out_Last is NOT omitted).
If Out_Next is asserted during a transaction of a data word (Out_Valid and Out_Ready both are high), Out_Last is asserted immediately on this word.
Example for skipping a packet containing the data 0x1, 0x2, 0x3, 0x4:
Out_Next can also be detected when Out_Valid or Out_Ready are low (i.e. in between transactions). However, it is strongly suggested that the signal is kept asserted until a transaction (Out_Valid and Out_Ready both are high) for easy understanding of the waveforms and to be in-line with the AXI4-Stream handshaking protocol. If Out_Next is asserted between transactions, one more word is read after the assertion - this is required because Out_Last must be asserted during a transaction according to the AXI4-Stream protocol.
Repeating Packets on Read Side¶
This feature is only supported for FeatureSet_g=FULL.
For repeating a packet on the read side, the Out_Repeat signal is asserted anywhere between (including) the transaction of the first data word and (including) the transaction of the last data word. The remaining data of the packet still is read but after the last word of the packet, the same packet is repeated.
Example for repeating a packet containing the data 0x1, 0x2, 0x3, 0x4:
For repeating a packet immediately in the middle of a packet and without reading the remaining words, Out_Repeat and Out_Next can be asserted both at the same time.
Example for repeating a packet containing the data 0x1, 0x2, 0x3, 0x4 immediately:
Out_Repeat can also be detected when Out_Valid or Out_Ready are low (i.e. in between transactions). However, it is strongly suggested that the signal is kept asserted until a transaction (Out_Valid and Out_Ready both are high) for easy understanding of the waveforms and to be in-line with the AXI4-Stream handshaking protocol.