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olo_base_pkg_array

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VHDL Source: olo_base_pkg_array

Description

This package contains different array types which are used in Open Logic internally but also on its interfaces to the user (e.g. for generics). The package is written mainly for these purposes and does not aim for completeness - nevertheless as a user you are free to use it for your code of course.

Definitions

StlvArray\<N>_t

Arrays of std_logic_vector of width N for regularly used widths.

Options for \<N>: 2...30, 32, 36, 48, 64, 512

Example:

variable x : StlvArray4_t(0 to 9);  -- An array containing 10 std_logic_vector(3 downto 0);

\<T>Array_t

Arrays of different types .

Options for \<T>: bool, integer, real

Examples:

variable x : IntegerArray_t(0 to 2); -- An array of 3 integers
variable y : BoolArray_t(0 to 3);    -- An array of 4 bools
variable z : RealArray_t(0 to 1);    -- An array of 2 reals

There are also arrays of unconstrained vectors:

signal u : StlvArray_t(0 to 15)(63 downto 0);
signal v : UnsignedArray_t(0 to 15)(63 downto 0);
signal w : SignedArray_t(0 to 15)(63 downto 0);

Functions

Converter Functions

Convert one array type into another.

function arrayInteger2Real(a : in t_ainteger) return t_areal;
function arrayStdl2Bool(a : in std_logic_vector) return t_abool;
function arrayBool2Stdl(a : in t_abool) return std_logic_vector;

For bool and std_logic_vector '1' is converted to true and '0' to false.

flattenStlvArray() / unflattenStlvArray()

Flatten a StlvArray_t into a std_logic_vector or unflatten a std_logic_vector into a StlvArray_t.

function flattenStlvArray(a : in StlvArray_t) return std_logic_vector;
function unflattenStlvArray(a : in std_logic_vector; elementSize : positive) return StlvArray_t;

Note that the functions assume that the StlvArray_t is indexed using (0 to N-1) and that the elements are indexed using (N-1 downto 0).

The mapping is that bit 0 of element 0 of the array is mapped to bit 0 of the resulting vector.